Evaluation of impact of parasitic magnetic coupling in PCB layout on common source inductance of surface mounted package

Recently, the common source inductance (CSI) is regarded as one of the most important obstacles for achieving ultrafast switching of switching converters. The CSI is pointed out to be a major cause of deterioration of the switching speed and false triggering. Therefore, many design instructions of next generation switching devices, such as GaN-FETs and SiC-MOSFETs, have pointed out the necessity to reduce the CSI. Certainly, many of the next generation switching devices are provided in surface mount packages in order to enable PCB designers to minimize the CSI by eliminating the common source path. However, the parasitic magnetic coupling between the gating circuit and the power circuit may still add the CSI, although preceding studies have scarcely reported how greatly the PCB layout can affect the CSI and the switching waveforms. This paper experimentally evaluated the impact of the parasitic magnetic coupling of the PCB layout on the CSI of the surface mount package and on the switching waveforms. As a result, the parasitic magnetic coupling was found to cause the major difference in the CSI. In addition, large difference in the turn-off switching waveforms was found to be caused by the difference in the magnetic coupling. The reason is also analyzed and discussed in this paper, suggesting importance of appropriate design of the parasitic magnetic coupling in the PCB layout.