VLSI Implementation of Cordic and CSD based Loeffler DCT Architecture

A low power discrete cosine transform (DCT) architecture is presented. It is implemented through Loeffler DCT based on the coordinate rotation digital computer (Cordic) algorithm and the canonical sign? digit (CSD) multiplier-less architecture. The simulation and synthesis results show that the proposed 8-point one-dimensional DCT architecture consumes lower power and smaller area.