Analytic Modeling of Breakdown Voltage Shift in the CMOS Buried Multiple Junction Detector

Abstract We propose an analytical model for the CMOS Buried Multiple Junction (BMJ) detector exhibiting breakdown voltage shift depending on adjacent junction’s bias. The device’s singular behavior has been observed when two adjacent junctions are in reach-through (RT) condition. The breakdown current has been identified to be predominated by thermionic emission. The proposed model determines, for a given BMJ structure with uniform or Gaussian doping distributions under bias conditions, whether two adjacent junctions are in RT condition. In this case, it calculates the merged depletion limits, electric field and electrostatic potential profile. The potential barrier height of each merged depletion region can then be extracted and the thermionic current be computed. Model computations have been compared with TCAD simulations and measurements on the BMJ detector. Good agreements have been observed for different structures in different bias conditions at different temperatures.