An 80 Mbytes/s data transfer and processing system

Abstract We describe hardware and software aspects of a very fast and versatile, yet conceptually simple, data transfer and processing system for use with future accelerators. It consists of a transputer-based crate controller (CC), which includes an Intel i860 microcomputer, and of a set of readout cards (RC), each containing a digital signal processor (DSP) for fast data parametrisation and compaction. The reduced data is written into a dual port memory (DPM), where it can be accessed concurrently by the transputer and transferred to a common DPM on the CC card. A crateful of data thus assembled at one place can further be processed by the powerful i860 microcomputer. Address generators (simple binary counters) are included on the crate controller and each readout card to enable direct memory access (DMA) operations, resulting in a considerable increase in data transfer speed (maximum 80 Mbytes/s). The use of a transputer as the sole controlling processor, in conjunction with DPMs, renders bus arbitration unnecessary, leading to very simple interfacing logic and operating software. The four high-speed serial links of the transputer greatly facilitate downloading of programs and intercrate communications. An Intel i960CA processor, situated on the CC card, is used for fast data transfer between crates by means of its 32-bit wide DMA channel. The operating software is written in the Occam language, which was specially developed for programming concurrent systems based on transputers.