Optimization of the National Superconducting Cyclotron Laboratory Digital Data Acquisition System for use with fast scintillator detectors

Abstract The Digital Data Acquisition System (DDAS) at the National Superconducting Cyclotron Laboratory (NSCL) has expanded to instrument arrays composed of fast-scintillator detectors. The expansion has motivated the development of software designed to optimize the time- and energy-resolving capabilities of the system, which is a collection of 16-channel FPGA-programmable modules running 12- and 14-bit ADCs with sampling frequencies of 100 and 250 MSPS, respectively. Using the techniques described herein, the time resolution of the DDAS electronics has been substantially improved. For signal amplitudes occupying 10 % the full range of the ADC, the time resolution of the DDAS electronics, measured online, has been reduced to 100 ps and 40 ps for 100 MSPS and 250 MSPS modules, respectively. A time resolution of ≈ 350 ps, at 511 keV, between two 38 mm×38 mm lanthanum bromide (LaBr 3 ) detectors, equipped with Hamamatsu R6231 photomultiplier tubes (PMTs), has also been realized. Similar optimization techniques applied to the DDAS energy-extraction algorithms have yielded energy resolutions below 2% at 1.33 MeV for both the 100 and 250 MSPS digitizers using the same LaBr 3 detectors. The techniques described in this work are broadly applicable to other digital acquisition systems that are capable of recording the digitized raw detector signals.