TED: A Graphical Technology Description Editor

Design verification has historically been performed on mainframes and minis. As a result of the pervasive use of character terminals, process technology specifications have always been provided in textual form. It is difficult to visualize and understand layer dependencies, design rules and material properties by looking at a textual description of what can be a large and complex network of relationships. The increasing complexity of new processes (and even in some of today's bipolar and Bi-MOS processes) and the proliferation of CAE workstations has made an interactive, graphical method of defining and editing technology descriptions both necessary and possible. This paper describes one such approach and its embodiment in a tool which is part of the system software on an electron-beam probe station.