Accelerating signal processing algorithms in digital holography using an FPGA platform

2003 
This paper describes the implementation of a custom DSP system to accelerate image processing algorithms used in the field of digital holography. The system, implemented on an FPGA platform, is intended for real-time reconstruction of images captured on a large image sensor. Due to the large amount of processing information, it is not possible to perform a HDL simulation of a complete image reconstruction in reasonable time. Instead, a reconfigurable solution is being used for full scale image reconstruction, exhaustive testing of the functionality and for connecting the accelerator to external components, i.e. the image sensor, monitor output device and high-speed memory banks.
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