Analysis of non-idealities in folding and interpolating ADCs using a behavioral model approach

This paper presents a behavioral model approach for analyzing a folding and interpolating analog-to-digital converter (ADC). The model is constructed using mathematical equations in a C program to describe the behavior of each block of the system, and it is used to analyze non-idealities such as mismatches, bandwidth limitations, and non-linearity in the folding amplifiers, interpolation network, and comparators of the folding and interpolating ADC. The results aid the design of a folding and interpolating ADC by providing a comprehensive set of design criteria that must be satisfied by each building block.