Design of a high parallelism high throughput HSPA+ Turbo decoder

Research in high throughput, high performance Turbo coding systems has an important significance for the development of modern wireless communication systems. This work presents a design of a high parallelism high throughput HSPA+ Turbo decoder in which a novel anti-contention structure named TMFDB is adopted to solve the memory contention problem more efficiently. The circuit is synthesized by Synopsys DC with TSMC LP 65nm technology, and the result shows that it can work in a maximum frequency of 465MHz, which means an throughput up to 792Mbps when the number of iteration is set to 5.5, and meet HSPA+'s throughput demands of 672Mbps.