Embedded real-time EtherCAT master station construction method based on ARM

The invention relates to an embedded real-time EtherCAT master station construction method based on an ARM. The embedded real-time EtherCAT master station construction method realizes data communication between a CPU and the ARM through sharing a DPRAM of an FPGA by the CPU and the ARM. The embedded real-time EtherCAT master station construction method comprises the steps that: a master station is initialized; and the CPU sends a control instruction to the DPRAM of the FPGA, and the ARM obtains the control instruction from the FPGA and conducts periodic communication or non-periodic communication with a slave station. The embedded real-time EtherCAT master station construction method based on the ARM saves cost. The embedded real-time EtherCAT master station construction method adopts an LPC4330 high-performance embedded processor, can be changed on the basis of an original PCI bus, and has better cost advantage when compared with the traditional method of implementing an EtherCAT master station based on an industrial PC. The embedded real-time EtherCAT master station construction method implemented by the invention can be directly integrated in an embedded system for use, does not need to modify the original numerical control system software, reduces computation tasks of the host, reduces the usage rate of the CPU, and accelerates the operation speed. The embedded EtherCAT master station implemented by adopting the embedded real-time EtherCAT master station construction method can share program tasks generated by distributed clocks, state machines, frame operations and the like by adopting the protocol.