Normally-Off Computing for Crystalline Oxide Semiconductor-Based Multicontext FPGA Capable of Fine-Grained Power Gating on Programmable Logic Element With Nonvolatile Shadow Register

Normally-off computing (Noff computing) using a multicontext field programmable gate array (MC-FPGA) consisting of crystalline oxide semiconductor FETs has been developed. The Noff computing discussed in this paper is a control architecture for an MC-FPGA capable of performing fine-grained power gating on each programmable logic element (PLE) whose registers include a volatile register and also a nonvolatile shadow register for storing and loading data in the volatile register. The MC-FPGA performs fine-grained control of power supplied only to PLEs contributing to effective calculation, when context switching happens. With an MC-FPGA fabricated with a hybrid process of a 1.0 µm crystalline oxide semiconductor FET on a 0.5 µm CMOS FET, it has been confirmed that the proposed Noff computing can resume the previous task when a context switches back to it, increases PLE use efficiency, and reduces the power consumption by 27.7% at operating frequencies of 20 MHz with a driving voltage of 2.5 V.