A method of fabricating an integrated circuit photolithographic

A method for the photolithographic manufacturing an integrated circuit, the method comprising: Determining an illumination intensity profile of a projection lithography system (10) via a layer of time, corresponding to a target exposure position of a wafer (12), comprising the steps of: Disposing an illumination profile mask (32) in a plane in an illumination field that is defined by an illumination device (14), wherein the illumination profile mask having a plurality of openings (34) and wherein each opening has a separate proportion of radiation which is output from the lighting device which transmits ; Disposing a sensor array (14) in a measuring plane (42) in the exposure field, to detect each separate portion of the radiation separated; Disposing a focusing lens (38) in the exposure field between the illumination profile mask (32) and the sensor array, wherein the focusing optics comprises at least one lens to provide an image of the illumination profile mask a positive defocus; and Forming the illumination intensity profile from the detection results of the sensor array; Providing a layout of an integrated circuit corresponding to a layer to be formed in a wafer (12) by means of a lithographic process; Correcting the layout using an optical Nahbereichskorrektur- (OPC) routine to compensate for expected optical distortions encountered as a result of variations that are present in the composite illumination intensity profile; Manufacture of a reticle (18) according to the corrected layout; and Fabricating an integrated circuit using the reticle (18) to expose a layer of photoresist material.