Logic 90 nm n-Channel Field Effect Transistor Current and Speed Enhancements Through External Mechanical Package Straining

It is demonstrated that the appropriate external mechanical stress applied by the conventional IC chip's package straining can enhance device and circuit performance. A drain current enhancement of 4.9% at saturation is observed for 90-nm-node n-channel metal oxide semiconductor field effect transistor (nMOSFET) under a biaxial tensile strain of 0.096%. The current enhancement is nearly independent of gate width for 90-nm-node logic devices. Moreover, there is a 2.3% speed enhancement for a 90 nm-node logic ring oscillator using a parallel layout under the same biaxial tensile strain of 0.096%.