Chapter 4 Ultra-High-Speed HEMT Integrated Circuits

Publisher Summary This chapter discusses the technological advantages of high-electron-mobility transistor (HEMT). It describes an HEMT technology for very-large-scale integration (VLSIs) including material, device fabrication, and characteristics for device modeling. Current work and recent advances in HEMT logic and memory integrated circuits (ICs) are reviewed. The future performance of HEMT VLSIs for ultrahigh- speed computer applications is projected. HEMTs are very promising devices for VLSIs, especially operating at liquid nitrogen temperatures, because of their ultra-high speed and low power dissipation. The projected HEMT performance target suitable for VLSIs is a fundamental switching delay below 10 ps with a power dissipation of about 100 μ W per stage under 1 μ m design rule technology. By evaluating the gate length dependence of threshold voltage and K factor of short-channel HEMTs, short-channel effects were found not to be a problem in microstructures of submicrometer dimensions. Master - slave flip-flop divide - by- two circuits achieved internal logic delays of 22 ps/gate at 77 K and 36 psfgate at 300 K, at an average fan-out of about 2. HEMT technology has been shown to have desirable features for high-performance VLSI devices. A HEMT 1 kbit static RAM has been developed and has achieved an address access time of 0.87 ns to demonstrate the feasibility of high-performance VLSIs. Using the same technology, a HEMT 4 Kb sRAM has also been successfully fabricated and normal read/write operation confirmed.