0.7-V supply, 21-nW All–MOS voltage reference using a MOS-Only current-driven reference core in digital CMOS

Abstract A nano-power all-MOS voltage reference circuit is proposed without any integrated resistor or bipolar transistor to generate multiple voltage sources for the integrated blocks used in inexpensive digital CMOS technologies. It contains a current-driven voltage reference core made from standard nMOS transistors only, which can be powered up by a flexible biasing current without any limitation on its temperature characteristics. The sensitive core is protected from the unregulated voltage supply by a voltage follower MOS transistor, whose gate terminal is driven by a supply-insensitive voltage source from the biasing scheme. The biasing network produces an additional voltage reference using type of the biasing current made by the main voltage reference and a load transistor. A MOS-only design of the proposed reference employs MOS transistors instead of passive resistors and linear capacitors. A prototype of the proposed solution consumes 30 nA with an area of 0.005 mm2 in 0.18-μm CMOS process, producing a main voltage reference of 147 mV while operating at the supply voltage down to 0.7 V. Simulation results demonstrate an average temperature coefficient (TC) of 66.38 ppm/°C for a temperature range of −40 to 120 °C. The line sensitivity is about 0.031%/V for the line voltages above 1.3 V. The mean power supply rejection ratio (PSRR) is −90 dB and −64.4 dB at 10 Hz and 1 MHz, respectively, when the voltage supply is set to 1.8 V and an equivalent MOS capacitor of 5 pF is placed at the output. The 1% start-up settling time is 240 μs for a 1.0 V voltage supply step, and can be reduced by increasing the supply voltage.