Measurement and modeling of system-level ESD noise voltages in real mobile products

As the high performance very-large-scale integration (VLSI) systems operate with high speed and low voltage, the system-level electrostatic discharge (ESD) event is becoming one of the important noise sources causing logic errors and system malfunctions such as system reboot or fault. To understand the ESD noise phenomena and improve the system-level ESD noise immunity for devices, the accurate ESD noise measurement is necessary. In this paper, the measurement and modeling method for system-level ESD analysis is introduced and validated.