Finding the minimum quantity and the optimum placement of on-die temperature sensor in SOC design based on rank analysis

Accurate reading of on-die temperature sensor (OD-TS) has been more and more important in the advanced techniques for dynamic thermal management, on which high performance system-on-chip (SOC) rely. If the large number of OD-TSs are allowed, OD-TS can be placed uniformly to accurately detect the on-die temperature with adequate spatial resolution. However, since OD-TS including its control circuitry requires die area and routing complexity, which is proportional to the number of OD-TS included in SOC, the number of OD-TS is limited by the available area.[1] In this work, the authors will present a systematic methodology to find the minimum number and optimum placement of OD-TS in high performance SOC design based on heterogeneous many core architecture, which is based on analyzing rank and eigen-vector. The given conditions including the power-map for the corresponding scenario and the thermal resistance matrix (TRM) of the corresponding package structure will be used to demonstrate the usefulness of the presented methodology in SOC design. The packages used in the case studies the authors will present are package-on-package (POP) popularly used in smart-phone application. By utilizing the methodology proposed by authors, the die-area and routing area required for TS might be able to be minimized, which is eventually expected to be strong driver of the cost-effective reliable SOC design.