High-Level Language Tools for Reconfigurable Computing This paper provides a focused survey of five tools to improve productivity in developing code for FPGAs.

In the past decade or so we have witnessed a steadily increasing interest in FPGAs as hardware accelerators: they provide an excellent mid-point between the reprogramm- ability of software devices (CPUs, DSPs, and GPUs) and the performance and low energy consumption of ASICs. However, the programmability of FPGA-based accelerators remains one of the biggest obstacles to their wider adoption. Developing FPGA programs requires extensive familiarity with hardware design and experience with a tedious and complex tool chain. For half a century, layers of abstractions have been developed that simplify the software development process: languages, compilers, dynamically linked libraries, operating systems, APIs, etc. Very little, if any, such abstractions exist in the devel- opment of FPGA programs. In this paper, we review the history of using FPGAs as hardware accelerators and summarize the challenges facing the raising of the programming abstraction layers. We survey five High-Level Language tools for the de- velopment of FPGA programs: Xilinx Vivado, Altera OpenCL, BluespecBSV,ROCCC,andLegUptoprovideanoverviewoftheir tool flow, the optimizations they provide, and a qualitative analysis of their hardware implementations of high level code.