Low-Loss CPW Lines on Surface

This letter proposes a solution to the surface conduc- tion problem in silicon monolithic microwave integrated circuits (MMIC's). An LPCVD polycrystalline silicon layer is deposited over the surface of a high-resistivity silicon wafer which is then covered with a silicon dioxide layer. The polycrystalline silicon layer effectively removes, through traps, any free electrons or holes that may have been induced at the oxide-silicon interface. The CPW lines with 1.25- m aluminum metallization on passi- vated HRS substrates have an attenuation loss at 30 GHz of only 1.08 dB/cm.