Designing a low-voltage, high-current tunneling transistor

2015 
Introduction Tunneling field effect transistors (TFETs) have the potential to achieve a low operating voltage by overcoming the thermally limited sub-threshold swing voltage of 60 mV/dec [1], but results to date have been unsatisfying. The low-voltage operation is parameterized by the voltage required to obtain a 10× change in output current, called the sub-threshold swing voltage, S . The best reported sub-threshold swing voltage has been measured at a low current density of ~1 nA/μm, but unfortunately becomes significantly larger as the current increases. When trying to design a new low-voltage switch to replace the transistor, there are three major requirements to be fulfilled: The sub-threshold swing voltage needs to be much steeper than 60 mV/dec and ideally only a few millivolts per decade to reduce the operating voltage. A large on/off ratio of around 10 6 /1 is needed to suppress leakage currents. A high conductance density around 1 mS/μm (or 1 mA/μm at 1 V) is needed so that the switch can be significantly smaller than the wire that it drives while maintaining a high speed. While devices have been built that meet one or two of the three requirements, to date no logic switch meets all three requirements [1, 2]. No one has achieved a steep sub-threshold swing voltage at a high conductance. To understand this, we first consider a simple tunneling diode in Sections 5.2–5.6 to understand the essential physics of tunneling and then in Sections 5.7–5.9 we consider the additional complexities of building a full transistor. In TFETs the challenge is complicated by the existence of two switching mechanisms. The gate voltage can be used to modulate the tunneling barrier thickness and thus the tunneling probability [3–6] as shown Fig. 5.1(a) and (b). The thickness of the tunneling barrier can be controlled by changing the electric field in the tunneling junction. Alternatively, it is also possible use energy filtering or density of states switching as illustrated in Fig. 5.1(c) and (d). If the conduction and valence band do not overlap, no current can flow. Once they do overlap, current can flow.
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