Single event mirroring and sense amplifier designs for enhanced SE tolerance of DRAMs

This paper investigates the applicability of existing SRAM SEU hardening techniques to conventional CMOS cross-coupled sense amplifiers used in DRAM structures. We propose a novel SEU mirroring concept and implementation for hardening DRAMs to bitline hits. Simulations indicate a 24-fold improvement in critical charge during the sensing state using a 10K T-Resistor scheme and a 28-fold improvement during the highly susceptible high impedance state using 2pF dynamic capacitance coupling.