Switching structure coprocessor of core router

2008 
The invention relates to a core router switching fabric coprocessor, belonging to the internet backbone core router technical field. The invention is characterized in that: the coprocessor consists of an uplink module and a downlink module, is realized by an FPGA externally connected storage and supports 4 Gb/s pack wire-speed. The uplink module receives a data pack and filters useless data, then data is divided into two paths, each path of data pack is divided into a plurality of fixedlength data pieces with priority; each data piece is provided with a specific head in order to become a cell; cells belong to different queues according to the difference of priorities and destination addresses and are stored in the storage; cells are scheduled and transmitted to a switching fabric according to queue information and flow control information which comes from the downlink module; the downlink module receives the two paths of cells from the switching fabric, extracts the flow control information for the uplink module, cuts off the head of each cell and restores the cells into the data pieces; the data pieces belong to different queues according to the difference of source priorities and are stored in the storage; and the queues containing more than one complete data pack fragmentation take part in the schedule, data packs of successfully scheduled queues are output.
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