Nonvolatile semiconductor memory and its reading method, and a microprocessor
2005
To improve the reading speed. In the memory cell array (1) formed in a memory cell having two storage areas in one cell, the threshold of the outer storage area of the two memory cells which are symmetrical with respect to two bit lines adjacent to each other is set such that the relationship between the pair. Word line selection circuit (2) applies a read voltage to the word line connected to two memory cell to be read. The bit line selection circuit (3), together with a ground voltage is applied to the two bit lines that are immediately outside the two memory cells, applying a predetermined read voltage to the two bit lines of the inner. Reading converter (4a), by comparing the drain current flowing in (4b), (4c) in each of the memory cells that are activated and the word line selection circuit (2) by the bit line selection circuit (3), 1 One of the conversion to the data.
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