Polytonic fault‐free combinational circuits for alternate‐data‐retry

The alternate-data-retry (ADR) is a scheme which performs the retry using the 1′s complement of the input data, when an error is detected at the output, etc., of the logic circuit. By applying the scheme to the data-bus and memory unit where the data are processed without modification, all single stuck-at-faults can be masked without considerably increasing the hardware complexity. ADR is also known to be useful for the circuit realizing the self-dual function, such as adder, even though the data are modified. In the circuit realizing the self-dual function, however, there may be produced a fault which is not masked by ADR, if the circuit contains a gate with two or more fan-outs. This paper clarifies the necessary and sufficient condition for such a fault to exist. Based on the result, a circuit construction is proposed in which all single stuck-at-faults in the circuit can be masked by ADR, when any logical function is realized as a combinational circuit. By extending the method, a construction of the combinational circuit is shown, in which the double stuck-at-fault can also be masked, by employing four different inputs.