Optimization and realization of sub 100nm Channel length lateral Asymmetric Channel P-MOSFETS

Lateral Asymmetric Channel (LAC) p-MOSFETs with channel lengths down to 100 nm are optimized, fabricated and characterized as part of this study. We show, for the first time, the results of extensive experiments done on LAC p-MOSFETs, including the effect of tilt angle of V T adjust implant, on the device performance, both uniform and asymmetric devices are fabricated on the same wafer for more accurate comparison.