Current mode low BW - large peaking time CMOS S-G shaper using CA building cells

A novel CMOS current mode shaper for front end electronics is developed. In particular, a semi-Gaussian shaper implementation based on current mode cells (current amplifiers) is designed using an advanced filter design technique. Although the shaper architecture is fully integrated, it satisfies a relatively large peaking time specification. An analysis is also performed regarding the optimum selection of an inductor element simulator - three respective structures are designed using CAs, CCIIs and OTAs. The topologies are analytically compared in terms of noise performance, power consumption, total harmonic distortion (THD) and dynamic range (DR) in order to examine which is the most preferable in the SG shaper configuration. Analysis is supported by simulations results in a 0.35 µm process by Austria Mikro Systeme (AMS).