Growth of InAs–InAsSb SLS through the use of digital alloys

Abstract In order to improve the stability and repeatability of the growth of InAs–InAsSb (Ga-free) superlattices (SLs), we have investigated the use of an InAs–InSb digital alloy in place of the InAsSb ternary material. We report on a PIN structure made from Ga-free SL material grown using the digital alloy method, and compare the results to a reference PIN device composed of the InAs–InAsSb SL. The results for both devices show λ cutoff,0% =5 μm at T = 80 K , which is in agreement with the 14 ML InAs–12 ML InAs 0.81 Sb 0.19 SL design used. At T = 80 K and a bias voltage of V b = − 0.01 V ( V b = − 0.25 V ), the average dark currents (from 5 measured devices for each sample) for the ternary and digital alloy based devices are 0.1315 (4.249) A/cm 2 and 0.1068 (3.522) A/cm 2 , respectively. The quantum efficiencies under the same conditions are 24.1% (24.0%) for the ternary and 39.7% (39.9%) for the digital alloy. This improvement in quantum efficiency is attributed to superior crystalline quality in the digital alloy sample. These initial results show that the digital alloy sample is comparable to or better than the reference sample in each tested metric, and thus is worthy of further investigation.