A Harmonic Rejection Strategy for 25% Duty-Cycle IQ-Mixers using Digital-to-Time Converters

Due to the use of wide-band analog front-ends in order to cover the many different frequency bands used in Long Term Evolution (LTE), blocker signals received by the antenna may reach the mixer input. As a consequence, square-wave mixer implementations, as, e.g., the 25% duty-cycle current-driven passive mixer, may lead to the down-conversion of these blocker signals by their harmonic response. This contribution describes a harmonic rejection (HR) strategy, which modifies the local oscillator (LO) waveform of a 25% duty-cycle current-driven passive mixer, to suppress specific harmonics. Two HR control signal waveforms are proposed and their performance is evaluated by circuit simulations using a 28nm CMOS technology. By applying the proposed concept, the down-conversion of a blocker by the mixer’s $3^{\text {rd}}$ order harmonic response can be suppressed by more than 30 dB, and the receiver noise figure (NF) is improved by 21.1 dB for a blocker power of −5 dBm at the low-noise amplifier (LNA) input.