Charging and discharging batteries

Arrangements are provided which allow elimination of various diodes or semiconductor switches provided in prior art circuits (Figs. 1-8) in a battery charging or discharging path, whereby the power loss due to such components is avoided. A note-type personal computer may be powered by an internal battery or by an external source which also charges the battery, charge controller opening a switch (150, Figs. 9A, 11,12) between the battery negative terminal and the ground side of the computer circuits during charging. A battery pack may have an overdischarge prevention circuit 220 which turns off an FET21 in series with the battery in response to sensing overdischarge and in response to excess discharge current, another FET22 being turned off in response to excess charging voltage. The circuit 220 also has an external input 260 to which is applied a signal from a control section 281 of the apparatus powered by the battery, so that the FET's21, 22 can also be used as a battery on/off switch. Control section 281 operates a priority scheme so that the apparatus is supplied from the external supply if connected, or from a first battery 210 and then from a second battery 210' when battery 210 has discharged to a certain level. Two battery packs may be charged in parallel from a single constant current/constant voltage charging circuit (300, Figs. 10A, 15) which responds to whichever is the higher of the two battery charging currents and also responds to whichever is the higher of the two battery voltages when either voltage is above a reference level. Alternatively, two batteries may be charged in a time division manner from a constant current source (Figs. 10B,17). The batteries may discharge in parallel via respective DMOS-FET's (43, 44) which have parasitic diodes poled in the battery discharge direction. The gates of these FET's are connected to the external supply input so that they turn off when the external supply voltage is present.