Old Web
English
Sign In
Acemap
>
Paper
>
High Performance SiGe Nanowire Tunnel FETs: Low Temperature Characterization for Device Process Optimization
High Performance SiGe Nanowire Tunnel FETs: Low Temperature Characterization for Device Process Optimization
2014
A. Villalon
Alberto Revelant
C. Le Royer
Pascal Nguyen
Luca Selmi
Sorin Cristoloveanu
Keywords:
Nanowire
Optoelectronics
Process optimization
Materials science
Correction
Source
Cite
Save
Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI
[]