Programmable architecture for NFA-based string matching

In this paper, we propose a programmable string matching architecture to process multiple characters at a single cycle. To simplify the architecture of the previous works, we employ a method of realigning the input data stream by offsets. We show that some registers can be eliminated by using the method. Additionally, we present two different approaches to implement a programmable hardware for string matching on FPGA. We show the synthesis results for these two approaches.