E-beam inspection system for comparison of wafer and design data

Effectively patterning the intended design on the wafer for all possible geometries allowed by the design rule document is one of the most critical challenges for semiconductor manufacturing. Despite new lithography techniques like OPC, double patterning and the latest patterning simulation methods, and on-wafer evaluation using brightfield inspection and SEM review tools, patterning problems still occur and can result in a major delay in the qualification of a technology or product. Of particular concern are shorts and opens that cause product chip failure. Initial discovery of yield issues when a chip is being functionally tested is highly undesirable. A system for in-line, die to database (D2DB) comparison using E-beam inspection has been developed to address this risk. This system offers a substantial new line of defense against these patterning issues. The D2DB system is described along with a methodology for applying it for pattern fidelity inspection. Some examples illustrating the system operation are presented.