Noise contribution in a fully integrated 1-V, 2.5-GHz LNA in CMOS-SOI technology

This paper presents a study on the contribution of the parasitic elements of the input integrated inductors to the noise figure of a fully integrated low noise amplifier (LNA). The LNA topology is a single-ended common source with inductive degeneration. The optimum trade-off between transistor noise and inductor series resistor noise is demonstrated. Good noise figure is obtained while maintaining sufficient gain and linearity. Simulated results concerning a 2.5 GHz LNA in a 0.25 /spl mu/m partially depleted SOI-CMOS process, are presented to validate our analysis.