Tecnología ECMOS1-INAOE: Su aplicación en circuitos sumadores integrados

The design and characterization of CMOS full adders for DSP applications is presented in this work. These circuits were fabricated and tested at INAOE's Microelectronics Laboratory, using the ECMOS1-INAOE technology. The fabrication and characterization of these adders will improve the ECMOS1 cell-library leading, as the complexity of digital ICs increases in the future, to obtaining more reliable CMOS ICs.