Analysis of LEON3 systems integration for a Network-on-Chip

The LEON processor is a softcore for space applications that was developed by the European Space Agency (ESA). It is part of the GRLIB IP library, which allows the building of systems composed of IPs and custom components. The interconnection of components in a LEON3-based system is performed by means of the ARM AMBA 2.0 bus, using the AHB protocol for the high-performance cores and the APB protocol for peripherals. However, bus architecture does not meet the communication requirements of systems composed of dozens of cores, and the Network-on-Chip approach is used to overcome this limitation. In this context, this work describes the implementation of different LEON3-based systems and the necessary adaptations to integrate the processing cores to a Network-on-Chip.