Method of implementing PCI Express AHBUS state machine on the basis of FPGA (field programmable gate array)

The invention discloses a method of implementing a PCI Express AHBUS state machine on the basis of FPGA (field programmable gate array). The method includes the steps of S1, detecting a reset signal in real time, and changing the state of a state machine into IDLE_ST when high level of a reset signal input wire is detected; S2, detecting the reset signal in real time, and executing operation to change into ADDRESS_ST (address setting state) when low level of the reset signal input wire is detected and address bit changes; S3, executing operation to change into DATA_ST; S4, executing operation to change the state of the state machine into IDLE_ST; S5, detecting the reset signal in real time, and executing operation to change into REQ_BUS_ST and responding to a transmission request when the low level of the reset signal input wire is detected and the transmission request occurs. The method is high in speed and good in extensibility, data width of interfaces is customizable, the requirement for high-capacity data transmission is met, the interfaces need no memory in terms of drive and equipment, preparation time is short, and the speed is unaffected.