A 12-bit 80 MS/s A/D/A interface for power-line applications in 0.13 μm digital CMOS technology
2005
This paper presents an analog-to-digital-to-analog interface, consisting of a pipeline analog-to-digital converter and a segmented current steering digital-to-analog converter. The interface has been implemented in a 0.13 μm digital CMOS technology and is integrated in a system for high-performance broadband Power-Line Communications. In both cases, specifications are 12-b resolution and multi-tone power ratio over 56 dB within a 40-MHz signal bandwidth.
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