Characteristics optimization of stochastic ADC and its automatic generation system

In this paper, we propose an optimization method of stochastic ADC and propose its automatic generation system. The proposed NOR-based comparator can achieve high clock frequency at low input voltage. The proposed asymmetric comparator works without analog reference voltages. The automatic generation system generates a stochastic ADC using design parameter dependency of stochastic ADCs in a database. The generation system can improve the circuit performance by optimizing the type and the number of comparators using two comparator groups. The system generates a several candidate ADCs which can satisfy given specifications and the designer can select one ADC among them. The circuit is designed in 0.18-µm CMOS process, and the maximum input range, ENOB, and clock frequency are 0.25 Vpp, 7.35 bit, 1.25 GHz, respectively. The generation time is at most 42 s.