Old Web
English
Sign In
Acemap
>
Paper
>
Structure of a Low-Power FPGA Based on Synchronous/Asynchronous Hybrid Architecture
Structure of a Low-Power FPGA Based on Synchronous/Asynchronous Hybrid Architecture
2010
Ishihara Shota
Tsuchiya Ryoto
Komatsu Yoshiya
Hariyama Masanori
Kameyama Michitaka
Keywords:
Field-programmable gate array
Embedded system
Architecture
Asynchronous communication
Computer science
Correction
Source
Cite
Save
Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI
[]