Three-level Interleaved Voltage Source Inverter Topology Employing Hybrid "Si+SiC" Switches

This paper presents a three-level interleaved voltage source inverter topology employing hybrid Si IGBT and SiC MOSFET devices. Using a new modulation strategy that creates a group of low frequency switches (realized with Si IGBTs) and high frequency switches (realized with SiC MOSFETs), it achieves a good tradeoff between semiconductor device power loss and cost. The semiconductor device power loss of the proposed inverter topology is estimated using PLECS thermal modeling. Compared to the conventional three-level interleaved voltage source inverter topology using phase shifted carrier modulation and employing Si IGBTs, the proposed inverter topology and modulation method achieves significantly lower semiconductor device power loss. It slightly increases the semiconductor devices cost but the overall cost of the inverter is on par with its silicon counterpart due to its lower passive component cost (higher switching frequency operation).