A 2.4GHz highly linear class C power amplifier in 0.18 μ m CMOS technology
2007
This paper presents a class C power amplifier (PA) with high efficiency and linearity , implemented in 0.18 mum CMOS technology. The third harmonic is controlled by Biasing while the second harmonic is limited by employing the differential structure. It delivers a power gain of 19.7 dB at the input power of -12 dBm with power added efficiency (PAE) of 43%. The second and third harmonics are -35.1 dBc and -36.0 dBc. In order to drive a single-ended load, an off-chip balanced-unbalanced (balun) circuit is also designed and analyzed in this paper.
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