On determination of instantaneous peak and cycle peak switching using ILP

Power has becomes one of the crucial parameter while designing a SOC ICs. Power analysis of a circuit is important for reliability check, better design of power distribution network, packaging decisions and to solve power issues during test. High switching at a time demands high instantaneous current from power supply network. Which gates experience V dd drop leading to increase in delay of the circuit. Power consumed by circuit is proportional to switching activity at gate outputs and capacitance associated with it. Most of the previous work consider switching activity over entire clock period, however this is very pessimistic approach. All gates do not switch at the same time because of associated delays, thus peak switching occurring at an instant of time should be considered. In this paper we formulate an Integer Linear Programming for computing maximum transitions in the circuit at any instant time as well as during entire clock period. This method identifies a vector pair which provides the highest activity in the circuit. The proposed method captures the impact of glitches occurring during signal propagation. Our analysis shows that the maximum 75% of total gates can switch at any time instant and the maximum 625% of total gates can switch during clock period.