A 0.9 V 100 MHz 4 mW 2 mm/sup 2/ 16 b DSP core

1995 
A 0.25 /spl mu/m CMOS 0.9 V 100 MHz 4 mW 2 mm/sup 2/ DSP core is composed of a 16 b multiplier, a 32 b adder, an 8 kb SRAM, and a PLL. Voltage-scalable circuits capable of operating at 0.5 V to 2.5 V and level-converting interface circuits applied to the DSP make it suitable for multiple-supply-voltage portable systems.
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