20 GHz on-chip measurement of ESD waveform for system level analysis

Abstract Reliability of embedded electronic products is a challenging issue regarding ElectroStatic Discharge (ESD) events into real live applications. This is strongly related to the increased number of embedded systems and to technologies shrinking that result in less robust chips. To ensure the safety of electronic systems, the ESD events have to be taken into account at first design phase. But equipment manufacturers are facing the dilemma that no information is provided by the semiconductor manufacturers. At the same time Integrated Circuit (IC) designers have to take into account the final application environment to build the ESD protection strategy. Depending on the external components (external means around the chip) the on-chip current path could change. Understanding how the system environment impacts the current path within the chip is needed. This paper deals with on-chip oscilloscope developed for in-situ measurement of real ESD event in 65 nm CMOS technology. The measurement bandwidth of the embedded sampler is 100 GHz, and 20 GHz for the probes. Thanks to this technique, impact of the system on the current path of the on-chip ESD strategy will be observed. Some measurement results during an ESD stress on an I/O structure will be presented and analyzed showing that PCB trace and package induce the creation of new current paths.