Printed circuit board, and semiconductor package

Provided is a printed circuit board for preventing electric troubles such as signal disconnections due to via-substrate peels or via cracks, which are caused by various stresses to occur at a curving time. The printed circuit board comprises a first wiring layer (11), an electrically insulating substrate (12) formed on the first wiring layer (11) and having a via lower hole (12a) leading to the first wiring layer (11), and a second wiring layer (16) formed on the electric insulating substrate (12) and electrically connected with the first wiring layer (11) through the via lower hole (12a). The second wiring layer (16) is provided, on at least its portion near the via lower hole (12a), with a stress relaxing portion (17) for relaxing the bending stress, the tensile stress, the compressive stress and the shearing stress, which occur at the time of curving the electric insulating substrate (12).