Static random access memory (SRAM) with redundant structure

The invention discloses a static random access memory (SRAM) with a redundant structure. The SRAM comprises first to fourth pull-up tubes, first to fourth pull-down tubes, first to fourth load tubes, and first to fourth gate tubes. On the basis of a conventional SRAM structure, the load tubes are added between drains of the pull-down tubes and the pull-up tubes; the threshold value of each load tube changes within a range of -VDDI/2-0v, so that under the condition of no soft error, the load tubes are in a turn-on state all the time, and memory information is kept; under the condition of existence of soft errors, through the load tubes and a feedback mechanism of the redundant structure, the memory information can be recovered. The SRAM with the redundant structure has the advantages of high soft error resistance, high stability, low power consumption and compatibility with a commercial logic process.