Novel, Sem-Based Method for Wafer Inspection Recipe Optimization

This paper describes a novel route to brightfield (BF) wafer inspector recipe setup leading to substantially shortened recipe setup time and improved recipe quality. The traditional BF recipe optimization process involves adjusting several inspection parameters necessitating multiple iterations between the BF inspector and SEM review tool. Not only is "first time right" a requirement in today's IC fabs, but capture rates for critical yield limiting defects need to be maximized while the nuisance counts need to be minimized. Approaching recipe entitlement on BF is in danger of taking too long for a production environment, given the number of optics modes and the realities of queue times and other limitations in IC production environment. This paper presents a method and tool set that supports reaching this recipe optimization goal in a novel way by tightly coupling the review SEM into this process. Implementation in an IC fab resulted in a dramatic improvement in capture rate of critical defects from the previously employed process of record (POR), as well as substantial time savings in recipe optimization.