A Low-Power Deterministic Approach to Jitter Suppression in MEMS-Based Real-Time Clocks

Real-Time Clocks (RTC) based on a microelectromechanical system (MEMS) resonator are typically affected by a large frequency drift across the temperature range. To overcome this problem, digital circuitry is commonly employed to compensate for the thermal effects at the expense of a significant increase in output jitter which should be filtered with a PhaseLocked Loop (PLL). In this work, it is presented an alternative approach to jitter suppression where a Digital-to-Time Converter (DTC) removes the predominant deterministic portion of the output jitter, so to reduce consumption, area and complexity of the jitter-filtering blocks. Simulations in a 130 nm process show a 140 nA consumption from a 0.8 V power supply, with a reduction of the output rms period jitter from 944 ns to 31 ns.