Integration and reliability of a manufacturable 130nm dual damascene Cu/low-k process

2004 
This paper describes how a manufacturable Cu/low-k process with k=3.0 has been successfully integrated for 130nm technology node using 248nm lithography. Integration of the dual damascene dielectric stack and Cu metallization with regard to reliability improvement are explained. Yield and reliability data including electromigration (EM) and stress migration (SM) together with packaging performance demonstrate the manufacturability of the integration solution.
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