Area-Efficient Extended 3-D Inductor Based on TSV Technology for RF Applications

An extended model of through-silicon via (TSV)-based solenoid inductor is proposed to save on-chip areas for 3-D radio frequency (RF) ICs and package integration. To achieve a high inductance density, the nested topology consists of high-density TSVs in high-resistivity silicon substrate and multilayers of metals in compatible CMOS process. Then, an analytical inductance model, considering the mutual inductance of TSVs and complicated metal traces, is established and verified. The inductance variation in physical dimensions is studied based on the modeled and simulated results of a TSV solenoid inductor in single tier. The proposed TSV solenoid typology gets better performance at inductance density and quality factor around some frequencies through analytical model and full-wave simulations. Further studies are directed toward RF application overview according to broadband and low power consumption.